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application guide st75c520 revision 1.4 AN919/0597 i - introduction the purpose of this document is helping the cus- tomer to use the revision 1.4 of the st75c520. so the st75c520 revision 1.4 application guide answers some questions as : - are there some software differences between revision 1.3 and revision 1.4 ? - what kind of problem the revision 1.4 resolves and what kind of problem still remains ? - what do i have to do with the revision 1.4 if i want to bypass some problems i used to have with the revision 1.3 ? to answer those questions, sgs thomson pro- poses to the st75c520 users two annoted lists : - the st75c520 dsp code update - the st75c520 host patch list in the first list are described problems the customer may have been faced with. for those problems, sgs-thomson proposes a problem fixing status which indicates whether a solution has been proposed or not. there are two kinds of solution. the first one is a sequence of commands the customer has to add in his application in order to bypass the problem. generally, that solution is only valid for a specified revision of the st75c520. all the informations the customer needs are gath- ered in the st75c520 host patch list and the st75c520 dsp code update . in that case, the problem fixing status is patch xx, where xx is the reference of the solution in the host patch list. the second kind of solution is a dsp sequence directly added in the revision 1.4 of the dsp program. in that case, the problem fixing status is revi- sion 1.4. if no solution is yet proposed by sgs- thomson, the problem fixing status is . if the customer wants to use the revision 1.4 of the st75c520 and wants a problem to be solved, he checks a patch xx or a revision 1.4 in the prob- lem fixing status box of the paragraph which de- scribes that problem. if a patch xx is only indicated, the problem has not been corrected in the dsp code of revision 1.4. so the customer will have to keep the sequence proposed in the hpxx refer- ence of the host patch list. if a revision 1.4 is indicated in the problem fixing status box, a solution for that problem has been implemented in the dsp code and thus the customer must delete the sequence he used with the revison 1.2 or 1.3. in other words the sequence proposed by sgs- thomson for revision 1.2 or 1.3 is no longer required for revision 1.4. we know that it will take some time for the customer to make his software compatible with the revision 1.4 of the st75c520. but in the other hand, the updated software will be more efficient and concise than the old one. we hope this guide will help you to achieve that goal. sincerely, the application team contents page i introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 ii dsp code history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 ii.1 differences between st75c520 revision 1.2 and revision 1.3. . . . . . . . . . . . . . . . . . . 2 ii.1.1 transmit hdlc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 ii.1.2 received hdlc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 ii.2 differences between st75c520 revision 1.3 and revision 1.4. . . . . . . . . . . . . . . . . . . 3 ii.2.1 ram mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 ii.2.2 how to check the software and hardware version of a st75c520 chip ? . . . . . . . . . . . 3 iii how to use the st75c520 code update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 iv problem list summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 v host patch list summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 vi dsp code update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 vii host patch list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1/15
ii - dsp code history since the first prototype in 1993, the st75c520 dsp code deeply changed. and the purpose of this part is to sum up the major differences which occured between the three industrialized versions 1.2, 1.3 and 1.4. ii.1 - differences between st75c520 revision 1.2 and revision 1.3 apart from the two new features the revision 1.3 offers (see below), there are no differences in term of problem solving between revision 1.2 and 1.3. ii.1.1 - transmit hdlc three new global variables have been added in the revision 1.3 to allow the programmation of new 7e flags before the first frame, between the data frames and after the last frame : - _nhfbf: number of flags before the first frame. - _nhfcf: number of flags between frames. - _nhfst: number of flags after the last frame. the default value for these three variables is 0. the programming range is from 0 to 7fff (32767) (see figure 1). these new variables are set to zero after a reset or a init command. they can be overwritten at any time. the absolute addresses in rev 1.3 are: - _nhfbf > 0x17e2 - _nhfcf > 0x17e3 - _nhfst > 0x17e4 ii.1.2 - received hdlc a new global variable _rxcrc copies the crc of each received hdlc frame (it is valid until the end of the current frame). the receive crc can be optionally read with a mr command or by program- ming two optional status bytes with the dosr command. four new bytes are allocated inside the dual ram space for the storage of the received crc : address (hexa) description size (byte) mnemonic $18..$19 crc rx buffer 0 2,00 rxcrc0 $1a..$1b crc rx buffer 1 2,00 rxcrc1 if a new global variable called _flagcrc has a value different from zero, each time the st75c520 writes the receive data in the one of the receive buffer, it copies the received crc into the dual ram location rxcrc0 (associated with drtbf0) or rxcrc1 (associated with dtrbf1). these bytes must be read when the bit buff_efrm is set in the corresponding dtrbsx byte (see figure 2). these variables are set to zero after a reset or a init command and can be overwritten at any time. the absolute addresses in revision 1.3 are: - _flagcrc: 0x17e7 - _rxcrc: 0x17e9 remark : due to the time difference between the update of the optional status words and the re- ceive buffer mechanism, it is mandatory (if using the dosr command to read the received crc) to wait 0.5ms after the buff_efrm before read- ing the optional status words. 7e..7e 7e time to fill the buffer 1 time to fill the buffer 0 time to fill the buffer 1 (otherwise extra flags added) time to fill the buffer 0 nhfbf data transmitted 7e..7e 7e data time to fill the buffer 0 (otherwise extra flags added) crc data crc 7e..7e 7e form 2 serial 1 xmit 1 xmit 0 stop it tx nhfcf nhfst it tx it tx it tx it tx AN919-01.eps figure 1 : detailed timing diagram data received 7e..7e 7e crc0 rxcrc contents data0 7e..7e 7e crc1 data1 7e crc2 data2 7e..7e 7e crc0 crc1 crc2 AN919-02.eps figure 2 : detailed timing diagram st75c520 revision 1.4 2/15
ii - dsp code history (continued) ii.2 - differences between st75c520 revision 1.3 and revision 1.4 the revision 1.4 has been created to correct most of the revision 1.3 problems in the dsp code. the software modification mandatory for revision 1.4 are described in the st75c520 rev 1.4 code update . ii.2.1 - ram mapping no modification of the ram mapping between the revision 1.2, 1.3 and 1.4; all new variables have been added at the end of the memory. ii.2.2 - how to check the software and hardware version of a st75c520 chip ? if you want to know what version of software ver- sion you are working with, we would like to remind you with the idt command described page 21/ 44 in the st75c520 databook. if you send the idt command to the dual port ram, you will get in the comrep[0] the dsp software number, and in the comrep[1] the hard- ware reference (cf. page 28/ 44 in the st75c520 databook.). but for that, you will have to wait for one of the three dsp acknowledgement (it6, comsys = 0 or a new comack value). for example, you can have : 0001 0010 in comrep[0] > it means dsp soft revision 1.2 0010 0000 in comrep[1] > it means hardware reference = 2 iii - how to use the st75c520 code update all the problems discovered by sgs-thomson are referenced by using the following structure : px name date of discovery problem appearance problem fixing status description the nature of the problem is described. condition the problems conditions of appearance are explained. consequence major consequences the problem leads to are precised. probability when it is known, we precise the occurence of the problem and we choose a severity status (cf. color code below). patch sgs-thomson describes if some technical solu- tion has been found to bypass the problem. there are three possibilities for the problem fix- ing status box : - patch x : a sequence hpx is proposed to bypass the problem. - revision 1.x : the problem is fixed in revision 1.x of the st75c520. - for info : the problem is described for customer information. - : there is no solution available to bypass the problem. - patch included : the host patch is described with the problem. so there is no reference to the host patch list. in parallel, you will find a color code on the num- bering box to show the evaluated severity of the bug. this code is explained below. the bug has to be corrected the bug should be corrected for safety the bug has few consequences on your application all the host patches validated by the design are referenced by using the following structure : hpx name date of release revision 1.x pb corrected (numbers) host patch description description of the patch suitable for the revision 1.x release. st75c520 revision 1.4 3/15
iv - problem list summary p1 slicer v17 b1 sequence june, 96 revision 1.2 revision 1.4 p2 timing recovery june, 96 revision 1.2 revision 1.4 p3 v17 fast training june, 96 revision 1.2 revision 1.4 or patch 1 p4 calcul of _speed variable june, 96 revision 1.2 revision 1.4 or patch 1 p5 clearing of input samples june, 96 revision 1.2 revision 1.4 p6 dtmf detection june, 96 revision 1.2 revision 1.4 p7 time recovery june, 96 revision 1.2 revision 1.4 or patch 3 p8 v29 false lock detection routine june, 96 revision 1.2 revision 1.4 or patch 3 p9 dpll for v21ch2 june, 96 revision 1.2 revision 1.4 or patch 4 p10 v17 problem with agc unfrozen june, 96 revision 1.2 revision 1.4 or patch 1 p11 stop command in hdlc mode june, 96 revision 1.2 for info p12 fsk demodulator bug (1) oct 18, 96 revision 1.2 p13 fsk demodulator bug (2) oct 96 revision 1.2 p14 hdlc long data frames oct 18, 96 revision 1.2 patch 2 p15 ring polarity oct 96 revision 1.2 p16 various amplitude in v17 sept 9, 96 revision 1.2 for info p17 v17 compatibility vs rockwell ... sept 18, 96 revision 1.2 patch included p18 decimator failure after reset sept 21, 96 revision 1.4 patch included p19 japan line distorsion feb 1, 96 revision 1.2 patch 5 v - host patch list summary hp1 sequence d june, 96 revision 1.2, 1.3 p3, p4, p10 hp2 hdlc 4kb data lengh oct 24, 96 revision 1.2 to 1.4 p14 hp3 sequence for impulse noise june 13, 96 revision 1.2 to 1.4 p7, p8 hp4 dpll control for v21 rx june 4, 96 revision 1.2 to 1.4 p9 hp5 japan line patch feb 1, 96 revision 1.2 to 1.4 p19 st75c520 revision 1.4 4/15
vi - dsp code update in this document is listed all the known problems discovered by sgs thomson. the correction of some of these problems are listed in the st75c520 host pacht list . p1 slicer v17 b1 sequence june, 96 revision 1.2 revision 1.4 description slicer v17 b1 sequence needs to be 132, 68, 36, 20 points for fast training to avoid phase error in data mode entry. conditions snr at approximatively -25db. consequence degradation of phase c success rate. probability 1/200 of phase c failure. severity : low patch no host path available. p2 timing recovery june, 96 revision 1.2 revision 1.4 description in the calcul of t2 value, the timing recovery can potentially fail when the number y/ x is greater than 1. conditions some x and y values in the dsp. never seen with the st75c520 test card in any application. consequence potential degradation of phase c sucess rate. probability less than 1/ 10 000. severity : very low patch no host patch available. p3 v17 fast training june, 96 revision 1.2 revision 1.4 or patch 1 description a slightly modified sequence is necessary for v17 fast training (some dsp parameters have to be modified : _rx_sta, _rxstwrd, k2, k1inc, k2inc, betatrak, eqfroz, agcfroz). conditions any value of snr. consequence degradation of phase c sucess rate. probability unknown. severity : medium patch see host patch number 1. st75c520 revision 1.4 5/15
p4 calcul of _speed variable june, 96 revision 1.2 revision 1.4 or patch 1 description the dsp sometimes calculates its internal variable _speed with an error. conditions depends on relative phase of receive sample clock compared to that of the local oscillator at the end of rate sequence detection during training. consequence degradation of phace c sucess rate. probability 1/200 of tcf or phase c. severity : low. patch see host patch number 1. p5 clearing of input samples june, 96 revision 1.2 revision 1.4 description the input samples are not properly cleared when the carrier detect is lost in m_fax routine. conditions no specific condition of noise or signal level. consequence potential drift of the equalizer coefficients. probability very low. severity : very low. patch no host patch available. p6 dtmf detection june, 96 revision 1.2 revision 1.4 description the dtmf detection needs to be modified to increase the voice immunity. there are limitations to dtmf detection when dtmf frequencies are shifted and when dtmf level is around -20dbm (rxa pins). conditions polish tape voice immunity test (35mn). dtmf with +/-1.5% of frequency offset or -20dbm at rxa pins (a test report is available). consequence 80 false dtmf detections (polish tape). false digits or no digits detections (depend on the conditions). probability see consequence. severity : high. patch see host patch number 6. vi - dsp code update (continued) st75c520 revision 1.4 6/15
p7 time recovery june, 96 revision 1.2 revision 1.4 or patch 3 description the timing recovery in v27 ter 4800 and 2400bps can diverge. conditions high impulse noise or gain hit higher than 20db on the line. consequence transmission loss in v27 ter 4800 and 2400bps. probability unknown. severity : low. patch see host patch number 3. p8 v29 false lock detection routine june, 96 revision 1.2 revision 1.4 or patch 3 description the receivers v29 false lock detection routine is inactive if eq or agc are frozen. conditions eq or agc frozen and high impulse noise or gain hit higher than 20db. consequence transmission loss in v29. probability unknown. severity : low. patch see host patch number 3. p9 dpll for v21ch2 june, 96 revision 1.2 revision 1.4 or patch 4 description the dpll used for v21 channel 2 has a drift problem. conditions the received data are only 0" (resp. 1"). consequence extra or loss of zeros (resp. ones) while receiving in hdlc mode. probability 2/1000 rx_clock drift problems. severity : medium. patch see host patch number 4. p10 v17 problem with agc unfrozen june, 96 revision 1.2 revision 1.4 or patch 1 description in phase c, if the user unfreezes the agc, the value of the analog gain swings by a factor of 8% between segment p2 and pn, causing the data constellation to collapse. conditions agc algorithm unfrozen during v17 phase c. consequence broken phase c. probability always. severity : high in those conditions. vi - dsp code update (continued) st75c520 revision 1.4 7/15
patch see host patch number 1. p11 stop command in hdlc mode june, 96 revision 1.2 for info description in hdlc mode, if the stop command occurs while you are not sending a frame, the _nhfst flags are not transmitted. only _nhfcf are sent. but on the contrary if you are still feeding the buffers and a stop command occurs, then _nhfst flags are transmitted instead of _nhfcf between adjacent frames. conditions stop command sent long time after the last buffer feeding. consequence for information only probability not defined. severity : low. p12 fsk demodulator bug (1) oct 18, 96 revision 1.2 description the fsk demodulator has a bug for parallel mode. when rx_bit routine is called in fskrx.asm, the bsc register (which contains the edgshft value) is destroyed. because the rx_bit routine is called every 8 samples, you get a high bit rate error. conditions fsk demodulation (v23) in parallel mode. consequence v23 1200bps receiver not functional. probability always in those conditions. severity : high. patch no patch available. p13 fsk demodulator bug (2) oct 96 revision 1.2 description the calculation of the sample clock is shifted by one sample, giving a bad centering (-5, +3 instead of -4, +4). the fix consists in incrementing modulo and testing for zero, instead of calling rx_bit routine before testing zero. conditions fsk demodulation (v23). consequence a high bit rate error. probability always. severity : high. patch no patch available. vi - dsp code update (continued) st75c520 revision 1.4 8/15
p14 hdlc long data frames oct 18, 96 revision 1.2 patch 2 description the frame length you can receive in hdlc mode must be shorter than 4kbytes, otherwise an unpredictable error (abort frame) can be return in the status word (see conditions). this is due to an internal bit counter (rxctbit) that wrap around when it comes near 32767. conditions hdlc reception with data length greater or equal than 32760 bytes in all modes except v17 9600, v29 9600, v29 4800 and v27ter 4800. consequence the oversized frame is lost. probability always in those conditions. severity : medium. patch see host patch number 2. p15 ring polarity oct 96 revision 1.2 description the ring polarity is correct for wakeup but inverted for the ring detector because that detector is updated on the rising edge of the ring pin instead of the falling edge. if the sleep mode is not used, the detection time (sta_ring set to 1) is either 0.5 or 1.5 a ring period. conditions sleep mode used. consequence an additional ring period is needed. probability always in those conditions. severity : medium. patch no host patch available. p16 various amplitude in v17 sept 9, 96 revision 1.2 for info description with very high level of noise in v17, if you want to handle various amplitude between tcf and phase c, the data could collapse. this is due to the fact that there is no feedback between the equaliser error and the agc. conditions various amplitude between tcf and phase c in v17 mode with very high level of noise. agc unfrozen. consequence data collapsing. probability potential. severity : low. vi - dsp code update (continued) st75c520 revision 1.4 9/15
p17 v17 compatibility vs rockwell ... sept 18, 96 revision 1.2 patch included description when using rockwell v34 data pump in v17 fax mode, agc is jumping at the end of the tcf sequence. the following phase c could collapse. conditions v17 fax mode versus a v34 rockwell data pump. agc unfrozen. consequence phase c collapsing. probability always. severity : low. patch write mw 96 15 ff 7f (normthsh) 2ms after the sync 1 command (this mw command is already included in the patch 1). p18 decimator failure after reset sept 21, 96 revision 1.4 patch included description after a reset (or init or sleep command), the decimator (9.6 to 7.2khz) is not correctly initialised : instead of taking four samples as input, it takes one. conditions after a reset or init or sleep command. consequence the tone mode do not work properly. probability unknown. severity : high. patch send conf 00 00 after init for the tone mode (it is mandatory for revision 1.4 and compatible for all the previous revisions). p19 japan line distorsion feb 1, 96 revision 1.2 patch 5 description on japan lines, the tpg (group delay) is asymmetrical between 600hz and 3000hz. and thus some wrong dots can appear at the top of received pages. that problem is related to the timing recovery algorithm. conditions fax transmission on japanese telephone lines. consequence wrong dots at the top of received pages. probability unknown. severity : low. patch see host patch number 5. vi - dsp code update (continued) st75c520 revision 1.4 10/15
vii - host patch list in the list below are described the host patches validated by sgs thomson to bypass some specific problems. the structure of that document is explain in the application notice how to use the st75c520 code update. hp1 sequence d june, 96 revision 1.2, 1.3 p3, p4, p10 host patch description that cpu sequence is known as sequence d. it is used to solve v17 reception problems with revision 1.2 and 1.3 (that sequence has been implemented in the revision 1.4 and must not be used with that revision). there are two parts : the first for the tcf frame, the second for the short train reception. tcf conf v17 sync 1 wait 2ms mw 99 15 1f 00 /* set agc adaptation slow step size to a very high time constant (betatrak)*/ mw f8 15 00 00 /* k1 inc */ mw f9 15 00 00 mw fa 15 00 00 /* k2 inc */ mw fb 15 00 00 mw 96 15 ff 7f /* convthsh */ wait p2s wait 40ms /* from 21 to 60ms */ mw 15 10 13 00 /* agc slow mode (_rx_sta) */ wait sta_109 = 1 /* wait carrier detect */ wait 0.6s /* this is t1" time */ (**) mw 55 16 1f 00 /* alpha */ mw f5 15 00 00 /* k1 */ mw f4 15 00 00 wait 0.5s /* this is t2" time */ (***) mw 15 10 05 00 /* freeze agc and equalizer (_rx_sta) */ (**) in case of short data time for tcf (200ms instead of 1.5s), the minimum wait here is 130ms (256 bauds + 50 for margin). an additional command mw e3 16 xx yy is necessary immediatly after t1 to shorten the data mode. yy xx is a number of bauds given in hexadecimal value (scntr).the formula to calculate it is: yy xx = hex [ t2 / 0.417 ] (t1 and t2 times are defined in the sequence above) n.b: if t is the data time, you must have : t > ( t1 + t2 ) example : t1 = 130ms ; t2 = 20ms ; t = 200ms => yy xx = #30h (***) in case of short data time for tcf, the minimum wait here is 20ms. st75c520 revision 1.4 11/15
phase c conf v.17 modc short train sync 1 wait 2ms mw 99 15 1f 00 /* set agc adaptation slow step size to a very high time constant (betatrak)*/ mw 12 10 08 00 /* v17 14 400 */ (**) mw 15 10 1d 00 /* _rxsta */ mw 20 17 55 00 /* _rxstwrd */ mw 50 15 0b 00 /* stepsiz */ mw f7 15 00 20 /* k2 */ wait p2s mw 15 10 1b 00 /* unfreeze agc */ wait 40ms /* from 21 to 60ms */ mw 15 10 1f 00 /* freeze agc */ wait pns mw 55 16 1f 00 /* alpha */ mw f6 15 00 00 /* k2_lsb */ mw f7 15 00 00 /* k2_msb */ wait sta_109 = 1 /* wait carrier detect */ mw 55 16 04 00 /* alpha */ mw f7 15 ea 06 /* k2_msb */ wait 110ms /* more than 256 bauds */ mw 15 10 05 00 /* freeze equalizer and agc */ (**) the mw to use here depend on the v17 speed you want to use : mw 12 10 08 00 /* v17 14400 */ mw 12 10 07 00 /* v17 12000 */ mw 12 10 06 00 /* v17 9600 */ mw 12 10 05 00 /* v17 7200 */ remark : application sequence for a short data time reception with revision 1.4 in that paragraph is described how configuring the st75c520 revision 1.4 for v17 short data time reception (from 200ms to 1.5s) : conf v17 sync 1 (**) wait sta_109 = 1 wait 130ms /* 256 bauds + 50 (margin) */ mw e3 16 xx yy /* where yy xx is a number of bauds given in hexadecimal value (scntr) */ (**) in case of short train instead of long train, an additional command must be written between conf v17 and sync 1 : modc short train the formula to calculate the yy xx value is yy xx = hex [ t2 / 0.417 ] (t1 and t2 times are defined in tcf part of p1 host patch) n.b : if t is the data time, you must have : t > ( t1 + t2 ) example : t1 = 130ms ; t2 = 20ms ; t = 200ms => yy xx = #30h vii - host patch list (continued) st75c520 revision 1.4 12/15
hp2 hdlc 4kb data lengh oct 24, 96 revision 1.2 to 1.4 p14 host patch description => lines to insert after the conf command and the selection of the hdlc mode : dosr 01 b7 96 00 /* write bit_counter high byte in staopt1 */ => lines to insert while waiting for loss of carrier detect (end of data mode). but you can put them in any other places periodically read during the frame detection. bit_counter_high_byte = staopt1 if (bit_counter_high_byte > 50h) { /* test if bit_counter is above #5000h (or 20480) */ mw b7 16 00 04 } /* reset bit_counter down to #0400 (or 1024) */ with that modification, you will be able to send hdlc frames with no limitation of data size. because the bit counter will be kept away from #0000 and #7fff limits. hp3 sequence for impulse noise june 13, 96 revision 1.2 to 1.4 p7, p8 host patch description there is two different sequences for v29 and v27 ter modes. they should be useful too if the customer introduce short cuts of carrier during v29 or v27ter communications. v27 ter conf v.27ter sync 1 mw e6 15 65 02 /* k1adr for timing recovery (coef29) */ wait sta_109 = 1 wait 500ms (*)(**) mw 15 10 05 00 * rxsta = eq and agc frozen */ mw 55 16 1f 00 /* alpha */ mw f5 15 00 00 /* k1 recovery*/ v29 conf v.29 sync 1 wait sta_109 = 1 wait 500ms (*)(**) mw 15 10 05 00 /* rxsta = eq and agc frozen */ mw 55 16 1f 00 /* alpha */ mw f5 15 00 00 /* k1 recovery*/ (*) if you want to decrease this time you must use modc 01 00 00 00 command before sync 1. however, the dsp needs at least 256 bauds to compute the equalizers coefficients after sta_109 is set to 1. (**) if you are using the patch hp5, you will need to wait more than 4s. because if you dont, you will see some compatibility problem. remark : in the revision 1.4, the dsp software has a special algorithm to avoid rotation of the constellation in case of v29 9600. this algorithm was not always activated in revision 1.2 and 1.3. vii - host patch list (continued) st75c520 revision 1.4 13/15
hp4 dpll control for v21 rx june 4, 96 revision 1.2 to 1.4 p9 host patch description a) temporary method for the revision 1.2 and 1.3 ( only! ) : stop the dpll with the mw 10 10 99 00 command (_curmod variable). this mw command has to be written between conf command and sync 1 command. remark : application feature for revision 1.4 when detecting the continuous 0" data, the dsp stops automatically the dpll. the number of continuous 0" after which the dsp stops the dpll is programmable with _nbzbytes variable (adress 17f8) : - _nbzbytes = 0 -> the dsp always stops the dpll ( default set up ) - _nbzbytes = 1 > the dpll stops after 8 bits equal to 0". - _nbzbytes = 2 > the dpll stops after 16 bits equal to 0". - _nbzbytes = n > the dpll stops after n x 8 bits equal to 0". vii - host patch list (continued) wait to advance in the state machine. tcf conf v.29 sync 1 sta_109 = 1 ? wait 1 second mr @ 15d9 stored in var continue tcf phase c conf v.29 sync 1 wait 2 ms mw @ 15d9 var mw @ 15df 1 sta_109 = 1 ? yes continue phase c regular initialization. wait carrier detect. leave some time to the timing recovery algorithm in order to process a "good" estimation of the timing offset (the more you wait, the better it gets). read _frqofft timing offset frequency and store in for next phase c. regular initialization. start synchronization of the receiver. recover the _frqofft timing offset frequency calculated during tcf. disable _pllcount set the timing recovery algorithm with narrow bandwith filter. wait carrier detect. no yes no start synchronization of the receiver. AN919-02.eps figure 3 : d hp5 japan line patch feb 1, 96 revision 1.2 to 1.4 p19 host patch description the sequence is described in the following flow chart. st75c520 revision 1.4 14/15
hp5 dtmf detection patches dec 20, 96 revision 1.2 to 1.4 p6 host patch description for revision 1.2 and 1.3 solution 1 : the analog gain frozen mode : mw d2 17 02 00 analog gain frozen conf 04 dtmf detection enable to keep the detection dynamic, you have to use the following sequence : mw ea 12 a5 0a lowpass gain mw 02 13 5e 65 hipass gain mw 2e 12 e0 00 higher threshold for low pass filter mw 2f 12 e0 00 higher threshold for high pass filter mw 1a 13 8a 02 gain for 697hz filter mw 26 13 30 03 gain for 770hz filter mw 32 13 00 02 gain for 852hz filter mw 3e 13 40 04 gain for 941hz filter solution 2 :the analog time constant low : in that mode, the time constant of the analog gain is lowered in order to avoid sta_dtmf instability : conf 04 dtmf detection enable mw de 17 00 f0 analog gain time constant low host patch description for revision 1.4 application patch : some memory writes have to be added after conf command in order to meet the special requirements described in the st75c520 rev1.4 dtmf detection report. by default, rev1.4 detects from -1dbm to -35dbm with a good speech immunity. mw 4a 13 89 05 1db attenuation for the 1209hz filter mw f2 17 00 14 comparaison threshold between 1209 and 1336hz mw f4 17 00 14 comparaison threshold between 1336 and 1477hz mw f5 17 00 14 comparaison threshold between 1336 and 1209hz mw 2e 12 60 00 lower threshold for low pass filter mw 2f 12 60 00 lower threshold for high pass filter solution 1 to -20dbm problem : the agc frozen mode mw d2 17 02 00 analog gain frozen conf 04 dtmf detection enable solution 2 to -20dbm problem : the agc time constant low conf 04 dtmf detection enable mw de 17 00 f0 analog gain time constant low vii - host patch list (continued) information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no licence is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectroni cs. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs-thomson microelectronics products are not authorized for use as critical components in lif e support devices or systems without express written approval of sgs-thomson microelectronics. ? 1997 sgs-thomson microelectronics - all rights reserved purchase of i 2 c components of sgs-thomson microelectronics, conveys a license under the philips i 2 c patent. rights to use these components in a i 2 c system, is granted provided that the system conforms to the i 2 c standard specifications as defined by philips. sgs-thomson microelectronics group of companies australia - brazil - canada - china - france - germany - hong kong - italy - japan - korea - malaysia - malta - morocco the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. st75c520 revision 1.4 15/15

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